VHDL语言在数字光端机专用芯片中的一个应用

A Application of VHDL in Designing Digital Optical Communication ASIC

VHDL作为IEEE的标准硬件描述语言，主要用于数字电子系统EDA。IEEE正讨论该语言用于模拟电子系统设计的标准。国内也已逐渐采用VHDL设计集成电路和大型电子系统。文中结合HDB3编译码电路设计，介绍VHDL语言的状态机设计风格与设计过程。

VHDL is a kind of standard hardware description language which used in EDA. IEEE is making the standard which extend to designing analogue circuit. In this paper,the circuit which encode and decode HDB3 is introduced including VHDL's format and design process.