高频小功率硅双极器件ESD潜在失效的无损检测方法

Undamaged Test Method of ESD Latent Damage in High-frequency Low-power Silicon BJT

目前国内外研究人员多集中于研究MOS器件和GaAs器件的静电放电(ESD)潜在性失效,而对高频小功率硅双极晶体管的静电放电潜在性失效则研究较少。为此,参考国内外研究人员的研究结果,选择采用高温反偏法、低频噪声法以及电参数测量法来对高频小功率硅双极晶体管静电放电潜在性失效的无损检测方法进行了较为细致的分析研究。通过详细比较后可以确定,高温反偏法和低频噪声法均不能用来检测高频小功率硅双极晶体管的静电放电失效,也就更不能用来检测判别此类器件的静电放电潜在性失效。最后,通过对多个电参数的测量与对比发现,高频小功率硅双极晶体管集电极-基极反偏结漏电流的大范围变化可以表征此类器件静电放电潜在性失效的存在。

Based on the test method of ESD latent damage in MOS and GaAs devices by researchers at abroad and home,the undamaged test method of ESD latent damage in high-frequency low-power Silicon BJT was put forward.High temperature reverse method,low frequency noise method and electronic parameters measurement method were discussed in detail.Comparison reveals that the high temperature reverse method and the low frequency noise method are ineffective in testing ESD failure of high-frequency low-power Silicon BJT,and they could not measure ESD latent damage in this kind of transistors yet.The electronic parameters measurement method verifies that the great change of leakage current of CE knot can judge the existence of ESD latent damage in high-frequency low-power Silicon BJT.