自偏置低噪放的设计与改进

The design and improvement of self-bias LNA

分析了贴片电容的非理想特性在C波段及以上频率的自偏置电路旁路应用中对低噪放设计的不利影响。分析表明,贴片电容用做自偏置旁路时将严重恶化电路的稳定性和噪声指标。提出了对自偏置电路的改进方法及工艺实现,从而避免了电容对指标的负面影响。为了验证改进电路的优势,采用改进的自偏置电路设计了6GHz～9GHz低噪放,实验结果很好地验证了其分析。

This paper analyzes the non-ideal characteristics of surface mount capacitors which have disadvantages to LNA design as a bypass of self-bias at the C-band or above. The analysis shows that： stability and noise figure specifications will be damaged when it is used for bypass in self-bias. This paper improves the self-bias circuit and avoids the impact of non-ideal capacitor. Improved self-bias LNA have been implemented, and the test results validate the analysis.