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面向可重构编译技术的RAM访问优化算法

RAM Access Optimization Algorithm Oriented to Reconfigurable Compiling Technique
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摘要 在基于低层虚拟机的四层C-to-VHDL可重构编译架构上,针对RAM访问和设计执行性能之间的矛盾,提出一种RAM读取优化算法。通过对IR访存指令及数据相关性的分析,创建专用数据通路,优化RAM的访存过程。实验结果表明,该优化算法能够有效减少RAM访问次数。 Aiming at the conflict between the RAM access and the design performance, in the four layer C-to-VHDL reconfigurable compiling framework which is based on Low Level Virtual Machine(LLVM) framework, this paper proposes an optimization algorithm for RAM access. By analyzing the load and store instruction in LLVM's IR and the data dependence, it creats a dedicated data path to optimize the process of reading and writing to RAM. Experimental results show that the optimized algorithm can effectively reduce the access number to RAM.
出处 《计算机工程》 CAS CSCD 北大核心 2011年第2期284-285,289,共3页 Computer Engineering
基金 国家自然科学基金资助项目(61003036) 中国博士后基金资助项目(20100471022)
关键词 C—to—VHDL可重构编译 FPGA设计 低层虚拟机 RAM访问优化 C-to-VHDL reconfigurable compiling FPGA design Low Level Virtual Machine(LLVM) RAM access optimization
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参考文献4

  • 1Gupta S, Dutt N D, Gupta R A, et al. SPARK: A High-level Synthesis Framework for Applying Parallelizing Compiler Translbrmations[C]//Proc. of the 16th International Conference on VLS1 Design. New Delhi, India: [s. n.], 2003.
  • 2Yankova Y D, Kuzmanov G K, Bertels K L M, ct al. DWARV: Delft Workbench Automated Reconfigurable VHDL Generator[C]//Proc. of the 17th International Conference on Field Programmable Logic and Applications. Delft, The Netherlands: [s. n.], 2007.
  • 3Guo Zhi, Buyukkurt B, Najjar W, et al. Optimized Generation of Data-path from C Codes For FPGAs[C]//Proc. of Design, Automation and Test in Europe Conference and Exhibition. [S. l.]: IEEE Press, 2009.
  • 4Koes D. The LLVM Compiler lnfrastructure[EB/OL]. (2009-10-30). http://llvm.org/.

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