摘要
高斯白噪声生成用于宽带短波信道模拟器系统,利用m序列发生器及查表法实现,采用现场可编程门阵列(FPGA)实现噪声生成器的设计,整个噪声生成器由VHDL语言编写,便于修改升级。仿真结果表明,基于FPGA设计实现的高斯白噪声生成器能够满足宽带短波信道模拟器性能指标要求,并且具有灵活性、通用性、修改参数方便等特点,具有很好的实用价值。
The Oaussian white noise generating was applied to wideband HF channel simulator, which adopts m sequence generator and look-up table. The noise generator designed by FPGA technology and programmed by VHDL can be easily upgrade. The simulation results indicate that the Gaussian white noise generator based on FPGA can satisfy the performance request of wideband HF channel simulator, and has characteristics of agility, universality and conveniences. It has a good practical value.
出处
《现代电子技术》
2011年第3期104-106,共3页
Modern Electronics Technique
基金
"泰山学者"建设工程专项经费资助