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一种LC型CMOS射频带通滤波器及其自动调谐 被引量：3

A RF CMOS LC Bandpass Filter with Automatic Tuning
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摘要 介绍了一种二阶可调谐CMOSLC型射频带通滤波器及与其匹配的压控振荡器设计。品质因数很高而且可以通过负电导发生电路调谐。目标频率由一组分立的亚波段组成,通过电容阵列来控制。仿真结果表明,滤波器采用TSMC0.18μmCMOS工艺,工作电压3.3V,中心频率调谐范围为2.05Hz至2.38GHz。文中简单介绍了锁相环自动调谐系统。为了与滤波器进行匹配,振荡器是基于滤波器的原型设计的,仿真结果表明它们匹配良好。 The paper presents a second order tunable RF CMOS LC bandpass filter with matched VCO.The quality factor is very high and can be tuned through an adjustable negative conductance generator circuit.The desired frequency tuning is accomplished by discrete tuning curve among a group of frequency sub-bands through capacitor array.The simulated results show the center frequency of the filter using TSMC 0.18 μm CMOS process can be operated from 2.05 GHz to 2.38 GHz under 3.3 V supply.The automatic tuning system in a PLL technique is simply introduced.To match the filter,the oscillator designed is based on the archetype of the filter and the simulation presents that they are in a good match.
作者 林之恒 侯政雄 田秋霜 张永来 高志强
机构地区 哈尔滨工业大学微电子科学与技术系
出处 《电子器件》 CAS 2010年第6期691-695,共5页 Chinese Journal of Electron Devices
关键词 LC带通滤波器 Q增强 自动调谐 振荡器 LC bandpass filter Q-enhancement automatic tuning VCO
分类号 TN713 [电子电信—电路与系统]
  • 相关文献

参考文献10

  • 1Georgescu B,Pekau H,Haslett J.Tunable Coupled Inductor Q Enhancement for Parallel Resonant LC Tanks[J].IEEE Trans on Circuits and Systems-II:Analog and Digital Signal Processing,2003,50(10):705-713.
  • 2Chang C M,Al-Hashimi B M,Sun Y,et al.New High Order Filter Structure Using Only Single-Ended-Input OTAs and Grounded Capacitors[J].IEEE Trans on Circuits and Systems-II:Express Biriefs,2004,51(9):458-463.
  • 3Mohieldin A N,Sinencio E S,Martinez J S.A 2.7 V 1.8 GHz Fourth-Order Tunable LC Bandpass Filter Based on Emulation of Magnetically Coupled Resonators[J].IEEE J of Solid State Circuits,2003,38(7):1172-1181.
  • 4Khorramabadi H,Gray P R.High-Frequency CMOS Continuous Time Filters[J].IEEE J Solid-state Circuits,1984,19(6):939-948.
  • 5Kuhn W B,Yandurn N K,Wyszynski A S.Q-Enhanced LC Bandpass Filters for Integrated Wireless Application[J].IEEE Trans on Microwave Theory and Techniques,1998,46(12):2577-2586.
  • 6Kuhn W B,Stephenson F W,Riad A E.A 200 MHz CMOS Q Enhanced LC Bandpass Filter[J].IEEE J of Solid-State Circuits,1996,31(8):1112-1122.
  • 7Dandan Li,Yannis Tsividis.Design Techniques for Automatically Tuned Integrated Gigahertz Range Active LC Filters[J].IEEE Journal of Solid-State Circuits,2002,37(8).
  • 8Lee S S,Uchida H,Soda1 S,et al.An Rfmems Switched Capacitor Array for a Tunable Band Pass Filter[C] //The 14th International Conference on Solid-State Sensors.Actuators and Microsystems,Lyon,France,June,2007,10-14.
  • 9陈殿玉,陈浩琼,岂飞涛,高清运,秦世才.OTA-C压控振荡器的分析与设计[J].南开大学学报（自然科学版）,2004,37(3):17-19. 被引量：2
  • 10Tsung-Hsien Lin,Yu-Jen Lai.An Agile VCO Frequency Calibration Technique for a 10-GHz CMOS PLL[J].IEEE J Solid-State Circuits,2007,42(2):340-349.

二级参考文献8

  • 1Linares-Barranco B. Rodriguez-Vazquez A, Sanchez-sinencio E, et al. CMOS OTA-C high-frequency sinusoidal oscillators[J]. IEEE J of Solid-State Circuits, 26(2):160～165.
  • 2Linares-barranco L rodriguez-vazquez A, Huertas J L, et al. Generation, design and tunning of OTA-C high frequency sinusoidal oscillator[J]. IEE Proceeding G139(5):557～568.
  • 3Behzad Razavi. Design of Analog CMOS Integrated Circuits[M]. New York: IEEE Press, 2001.
  • 4Krummenacher F, Joehl N. A 4MHz CMOS continuous-time filter with on-chip automatic tuning [J]. IEEE J.SSCS, 1998, 23(3):750～758.
  • 5Linares-Barranco B. Rodriguez-Vazquez A, Sanchez-sinencio E, et al. CMOS OTA-C high-frequency sinusoidal oscillators[J]. IEEE J of Solid-State Circuits, 26(2):160-165.
  • 6Linares-barranco L rodriguez-vazquez A, Huertas J L, et al. Generation, design and tunning of OTA-C high frequency sinusoidal oscillator[J]. IEE Proceeding G139(5):557-568.
  • 7Behzad Razavi. Design of Analog CMOS Integrated Circuits[M]. New York: IEEE Press, 2001.
  • 8Krummenacher F, Joehl N. A 4MHz CMOS continuous-time filter with on-chip automatic tuning [J]. IEEE J.SSCS, 1998, 23(3):750-758.

共引文献1

同被引文献28

  • 1Wang Ping-Ying, Zhan Jing-Hong Conan, Chang Hsiang-Hui, et al. A Digital Intensive Fractional-N PLL and All-Digital Self- Calibration Schemes [ J ]. IEEE Journal of Solid-State Circuits, 2009,44 (8) :2182-2192.
  • 2Volodymyr Kratyuk, Pavan Kumar Hanumolu, Kerem Ok, et al. A Digital PLL with a Stochastic Time-to-Digital Converter [ J]. IEEE Transcations on Circuits and Systems 1,2009,56 ( 8 ) : 1612-1621.
  • 3Wu Chia-Tsun, Shen Wen-Chang, Wang Wei, et al. A Two-Cycle Lock-in Time ADPLL Design Based on a Frequency Estimation Algorithm[J]. IEEE Trans. Circuits Syst. ]I,2010,57(6) :430-434.
  • 4Xu Liangge, Karl Stadius, Jussi Ryynanen. An All-Digital PLL Frequency Synthesizer with an Improved Phase Digitization Approach and an Optimized Frequency Calibration Technique [ J ]. IEEE Trans. Circuits Syst. 1,2012,59 (12) : 1 - 14.
  • 5张酷元,朱劲.一种新型数字锁相环的建模和实现[J].电子技术研发,2010(6):19-21.
  • 6周郭飞,苏厉,金德鹏,等.基于Vefilog-A数控Lc振荡器系统的行为级建模[J].集成电路设计与开发,2009,34(4):375-380.
  • 7Ihor Harasymiv, Manfred Dietrich, Uwe Knochel. Fast Mixed-Mode PLL Simulation Using Behavioral Baseband Models of Voltage- Controlled Oscillators and Frequency Dividers [ C ]//SM2ACD, 2010 : 1-6.
  • 8Jingchang Nan, Jianwei Ren, Mifang Cong, et al. Design of PLL Be- havioral Model Based on the Verilog-A[ C1//2011:380-383.
  • 9Olsson T,Nilsson P. A Digitally Controlled PLL for SoC Applications [J]. IEEE Journal of Solid-State Circuits,2004,39(5) :751-760.
  • 10Mendel S, Vogel C, Da Dalt N, et al. A Phase-Domain All-Digital Phase-Locked Loop Architecture without Reference Clock Retiming [ Jl- IEEE Trans. Circuits Syst. 11, Exp. Briefs, 2009,56 ( 11 ) : 860-864.

引证文献3

二级引证文献10

电子器件
2010年 第6期

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