无源超高频RFID时钟不敏感基带设计与实现

Design and realization of clock-insensitive base-band for passive UHF RFID

为提高无源超高频RFID电子标签的性能,针对通信过程中标签解码对时钟精度要求严格以及反向散射编码需实现多通信速率的特点,提出一种对时钟精度相对不敏感的基带设计方法。通过区间分段的分频控制方法实现多通信速率的控制,采用相对比值解码的方法解决对基带时钟精度要求严格的问题。该设计实现了通信速率从40KHz到640KHz的动态覆盖,满足ISO/IEC18000-6C协议中对反向链路频率的规定,同时整个基带对系统时钟的偏差不敏感,可以工作在一个动态系统时钟下,为进一步降低系统时钟进而降低功耗奠定了基础。该设计最终采用TSMC 180nm CMOS工艺实现流片,测试结果与设计结果相吻合,具有良好的性能。

To enhance passive UHF RFID tag performance,a design method of clock-insensitive base-band is proposed for the problems of accurate decoding clock and multiple backscattering frequencies during the communication process.It is by Section-divided method to deal with the multi-frequency communication controlling,and the relative value of decoding method to solve the accuracy of base-band clock demanding problems.The design realized the communication rate dynamically covering from 40KHz to 640KHz,meeting the backscattering link frequency demand of ISO/IEC18000-6C agreement,and the insensitivity of base-band to system clock make it easy working under a dynamic system clock which make the base for further reducing the system clock to reduce power consumption.Finally,the design is taped out with TSMC 180nm CMOS process,and test results have a good consistency with design expectations.