期刊文献+

基于CS5451A多路同步数据采集系统设计

Design of synchronous multi-channel data acquisition system based on CS5451A
下载PDF
导出
摘要 针对目前低电压等级的继电保护以及测控装置对数据采集的高精度、低成本的要求,提出一种多路同步数据采集系统的设计方案。该方案采用MPC8313为主控制器,CS5451A为模数转换器,通过对CS5451A Master模式串口输出时序以及FIFO读写时序的研究,在CPU和CS5451A之间设计了一个串并转换模块实现采样数据的接收,数据接收后存入FIFO缓冲区,这样解决了利用处理器SPI接口直接接收数据CPU占用率高的矛盾。 In consideration of the requirement of data acquision precision and low cost in the design of relay protection relay unit and measuring-control unit recently,a synchronous multi-channel data acquision system was designed and implemented. The design took MPC8313 as control unit and took CS5451A as AD converter.Through the study of the output timing of Master-mode serial interface and the timing of asynchroronous FIFO,it designed a serial-parallel conversion module and asynchroronous FIFO by using FPGA produced by XILINX corporation.After reception,the sampling data was stored in FIFO. Thus,it solved the problem of the high occupancy rate of CPU when used the SPI interface of CPU direct receiption of sampling data.
出处 《电子设计工程》 2011年第3期153-156,共4页 Electronic Design Engineering
关键词 FPGA 异步FIFO 模数转换器 CS5451A FPGA asynchroronous FIFO ADC CS5451A
  • 相关文献

参考文献6

  • 1Cirrus Logic,Inc. CS5451A DataSheet. [EB/OL]. (2005) [2010-07]. http ://www.cirrus.com/enlpubs/proDatasheet/ CS5451A_F3.pdf.
  • 2Freescale semiconductor. MPC8313 DataSheet. [EB/OL]. (2007) [2010-07]. http ://caehe.freescale.com/files/32bit/doe/ ref_.manual/MPC8313ERM.pdf.
  • 3XILINX Corporation. SPARTAN-3E FPGA Family:Complete Data Sheet. [EB/OL]. (2007-03-16)[2010-07] .http://www. xilinx.com/support/documentation/data_sheets/ds312.pdf.
  • 4XILINX Corporation. LogiCoreTM IP FIFO Generator v4.4 User Guide UG175 [EB/OL] . (2008-09-19) [2010-07]. http://www.xilinx.com/supporl/documentation/ip_documentation / fifo._generator_ug 175.pdf.
  • 5曾繁泰,陈美金.VHDL程序设计[M].北京:清华大学出版社.2008.
  • 6潘松,王国栋.VHDL实用教程[M].成都;电子科技大学出版社.2002.

共引文献2

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部