基于FPGA的空间目标碰撞预警系统

Space targets collision warning system based on FPGA

为了解决空间目标与航天器发生碰撞的问题,设计了一种基于FPGA,以在轨目标三维坐标为待处理数据进行快速并行处理的目标碰撞预警系统。该系统基于Xilinx公司FPGA芯片中的内容可寻址存储器(Content Addressable Memory,CAM)IP核和MicroBlaze软核控制器,利用嵌入式开发套件(EDK)进行搭建;并设计了空间危险目标的筛选算法,同时编写了软件及硬件代码,加载到以上系统中进行实际的操作验证。验证结果表明,该系统实现了16个目标中危险目标的快速筛选功能,通过使用ChipScope逻辑分析工具进行波形分析,可知系统执行一次筛选操作所需时间为1.8 s。

To solve the problem of the collision between the targets and the spacecraft, a space targets collision warning system was designed based on FPGA, and the data which are the three-dimensional coordinates of the targets can be deal parallel in the system. The system was built on the CAM IP core and MicroBlaze soft core controller in Xilinx FPGA under the environment of the Embedded Development Kit （EDK）. At the same time, an algorithm of sifting dangerous targets was designed, and software and hardware codes were compiled. After being verified in the system , the result proves that the system realizes the function of fast sifting dangerous targets from 16 targets. After analysing with ChipScope,it shows that the time period to operate a complete sifting is 1.Ss.