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一种极低功耗的CMOS带隙基准源 被引量:4

A ultra low power dissipation CMOS bandgap reference
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摘要 随着SoC在便携产品中应用的迅猛发展,低功耗技术变得越来越重要。本文采用了0.18um的标准CMOS工艺来,设计了一种无电阻、工作在亚阈值区的低功耗、小面积的CMOS电压基准源。这个带隙基准可以灵活运用于极低功耗的SoC系统中。这个电路的电源电流大约为150nA,可以在1.5V~3.3V之间的电源电压下工作,基准源的输出电压的线性度为44.4ppm/V。当电源电压为1.5V,室温下带隙基准电路的输出电压为1.1126V,100Hz频率下的电源抑制比为-66dB,当温度在-20℃与80℃之间变化时,输出电压的温度系数是55ppm/℃。整个带隙基准的芯片面积是0.011mm2。 With the development of SoC in portable devices, low power consumption becomes more and more important. A low power dissipation and small area CMOS voltage reference without resistance, which is operated in subthreshold area, is presented. The circuit includes the characteristics of low power, which is feasible for ultra low power SoC. It has been designed and simulated in 0.18urn standard CMOS process technology. The supply current of the above circuit is about 150nA and the line sensitivity is 44.4 ppm/V in a supply voltage range of 1.SV to 3.3V. When the supply voltage is 1.SV, the bandgap reference' s output voltage is 1.1126V at room temperature, and the temperature coefficient of voltage is 55 ppm/V in a range from -20 to 80℃. The power supply rejection ratio ( PSRR ) is -66dB at 100Hz in a supply voltage of 1.SV. The occupied chip area of bandgap reference is 0.011mm^2.
出处 《中国集成电路》 2011年第2期27-30,55,共5页 China lntegrated Circuit
基金 国家自然科学基金(No.60906010)资助项目
关键词 带隙基准 低功耗 亚阈值 SOC bandgap voltage reference, low power, subthreshold, SoC
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参考文献7

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