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一种非线性二阶补偿的CMOS带隙基准源

A CMOS Bandgap Reference with the Second Order Nonlinear Compensation
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摘要 该文依据带隙基准的基本原理设计一基于CSMC0.5um标准CMOS工艺的非线性二阶补偿的带隙基准电压源,在基准中利用非线性电流INL进行二阶补偿,该基准源的工作温度为-25℃~-125℃,温度系数为24×10-6V/℃。增加基于冗余晶体管的启动电路电流仅为1-2uA,具有较小的功耗,较好的可靠性。常温下的输出电压为1.25V,电源电压为3.3V-5.0V,达到了一般的应用要求。 According to the basic principle of bandgap reference,based on the CSMC standard CSMC0.5um CMOS process,we design a bandgap voltage reference with second order nonlinear compensation.Nonlinear current INL is used to second order compensation in the reference.The reference working temperature is-25℃~-125℃.Its temperature is 24×10-6V/℃.Current of start-up circuit of based on redundancy transistors is 1-2uA.The circuit has lowl power and good reliability.At room temperature,output voltage is 1.25 V,power supply voltage is 3.3 V-5.0 V.It reached general application requirements.
作者 王懋伟 杨虹
出处 《电子质量》 2011年第2期5-7,16,共4页 Electronics Quality
基金 重庆市教委科学技术研究项目(KJ100512) 重庆市自然科学基金项目(CSTC2010BB2412)
关键词 带隙基准 非线性二阶补偿 冗余晶体管 bandgapreference the second order nonlinear compensation redundancy transistors
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参考文献11

  • 1P.E.Allen.CMOS Analog Circuit Design Second Edition[M].
  • 2张庆中,陈星弼.晶体管原理与设计(第二版)[M].北京:电子工业出版社,2006.
  • 3李帅.低电压低功耗CMOS基准源补偿策略及电路设计[D].西安:西安电子科技大学硕士学位论文.
  • 4王忠鹏.单体锂离子电池直流充电管理集成电路的设计与研究[J].重庆:重庆邮电大学硕士学位论文.
  • 5D.Hilbiber.A new semiconductor vohage source [J].ISSCC Dig.of Tech.Papers,pp.32-33,Feb, 1964.
  • 6Behzad Razavi.Design of Analog CMOS Integrated Circuits[M].
  • 7R.J.Widlar.New Developments in IC Voltage Regulators[J].IEEE Journal of Solid State Circuits,Vol.sc-6,pp. 1-7,Feb. 1971.
  • 8K.E.Kuijk.A Precision Reference Voltage Source[J].lEEE Journal of Solid State Circuits,Vol.sc-8,pp.222-226,June. 1973.
  • 9A.P.Brokaw.A Simple Three-terminal IC Bandgap Reference[J]. IEEE Journal of Solid State Cireuits,Vol.se-9,pp.383-393,1974.
  • 10Gabriel Alfonso Rincon-Mora.Voltage Reference:From Diodes to Precision High-Order Bandgap Circuits[J].IEEE John Wiley & Sons.2001,10.

二级参考文献5

  • 1Xu Yong, Wang Zhigong, GuanYu, et al. Optimized design of a novel band-gap voltage reference[J]. Journal of Semiconductor, 2006, 27(12):2209-2213.
  • 2Khong-Meng Tham, Krishnaswamy Nagaraj. A low supply voltage high PSRR voltage reference in CMOS process[J]. IEEE Journal of Solid-state Circuits, 1995, 30(5):586-588.
  • 3Behzad Razavi. Design of Analog CMOS Integrated Circuits[M]. New York: The McGraw-Hill Companies, 2001 :384-390.
  • 4Andrea Boni. Member, IEEE, Op-amps and startup Circuits for CMOS band-gap references with near I-V supply[J]. IEEE Journal of Solid-state Circuits, 2002, 37(10): 1339-1342.
  • 5Banba H, Shiga H, Umezawa A, et al. A CMOS band-gap reference circuit with sub-I-V operation[J]. IEEE J Solld-state Circuits, 1999,34(5):670-673.

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