摘要
针对真随机数广泛应用的现状,基于振荡器采样和反馈电路竞争冒险机制,分析和设计了一款真随机数发生器。采用VHDL语言为描述工具,以纯数字IP核的形式提供了该发生器,并给出了一种与微控制器OC8051 IP核的挂接方法。选用Altera Cyclone-II FPGA开发板对随机数发生器进行验证,结果表明其逻辑和时序工作稳定,且随机数产生速率可达7.85M/s,完全通过7种随机性检测,可应用于实际的工程开发中。
Aiming at the wide application of true random number, based on oscillator sampling and race hazard of reactive circuit, a true random-number generator is analyzed and designed. With VHDL as the description tool, the generator is provided in the form of pure digital IP core, including a method for connecting the generator with microeontroller OC8051 IP core. The random-number generator is verified on an Altera Cyclone-Ⅱ FPGA. The verification results indicate that the proposed generator works well, its generating rate could reach 7.85 M/s, and the generated random number could pass seven typical randomness tests, and thus could be applied in the practical engineering development.
出处
《信息安全与通信保密》
2011年第1期72-74,80,共4页
Information Security and Communications Privacy
