一种基于DDS和PLL的Chirp超宽带信号源设计与实现

Design and implementation of an ultra-wideband Chirp signal source based on DDS and PLL

Chirp超宽带具有峰值平均功率比(peak to average power ratio,PAPR)接近为1、测距定位能力强等优势,能够有效解决传统的超宽带技术存在的PAPR过大、传输距离短等问题,设计并产生Chirp超宽带信号是实现该通信系统的关键技术之一。提出了一种高性能Chirp超宽带信号源方案,通过采用现场可编程门阵列(field-programma-ble gate array,FPGA)控制直接数字频率合成(direct digital synthesis,DDS)芯片AD9956产生低频Chirp信号,并结合锁相环(phase locked loop,PLL)技术实现带宽扩展,从而获得Chirp超宽带信号。实验表明,所设计的Chirp超宽带信号源具有结构简单、可编程、可扩展、性能好及实用性强等优点。

Chirp ultra-wideband has the advantages such as peak to average power ratio close to 1, strong ranging positioning capability, and it can effectively solve the problems of traditional UWB technology such as large PAPR, short transmission distance. One of the key technology in this communication system is to design Chirp UWB signal. This paper pro- posed a high performance Chirp UWB signal generator method, by using the FPGA （ field-programmable gate array） to control of DDS （direct digital synthesizer） chip AD9956 produced low-frequency Chirp signal, and then combined it with phase-locked loop （PLL） technology to implement the bandwidth expansion, thus gained Chirp UWB signal. Experiments show that the design of Chirp UWB signal source has the advantages such as simple structure, scalablity, programmability high performance, and practicality.