基于确定性的处理器硅后调试系统

A determinism based system for post-silicon debugging of processors

针对处理器硅后调试芯片可观测性差的问题，提出了一个可将硅片错误在仿真器中重现的处理器硅后仿真调试系统。为使实际系统的行为确定化，提出了简单有效的确定性同步器（DSync）。通过将不同时钟域的时间确定地关联在一起，该同步器可消除由于跨时钟域信号传输而导致的不确定性。根据处理器验证的实际需要，提出基本系统的概念。通过控制验证软件在基本系统范围内运行，无需记录系统输入就可实现仿真调试。实验结果表明，所提出的DSync和处理器仿真调试系统功能正确，实现简便，硬件开销小。

Aiming at the problem of low chip observability during the post-silicon debugging of processors, this paper proposes a determinism based post-silicon debugging system. A simple and effective deterministic synchronizer （DSync） is presented to realize the determinison of a real system. The DSync can eliminate the nondeterminism caused by clock domain crossing through detemainistically correlating the logical time in each clock domain. To simplify the ues of DSync in real sysstem, the concept of base-system is proposed. By controlling the running scope of validation software, no system input need to be recorded. The experiments show that the proposed system is functionally correct, easy to implement, and costs few hardware resources.