FPGA设计中的时序收敛与时钟切换

Sequence Convergence and Clock Switching in FPGA Disigning

FPGA作为最为广泛使用的可编程器件,已经广泛存在于我们的数字电路设计工作中。但是如果对FPGA缺乏深入了解,将严重影响FPGA实际工作的可靠性。本文介绍了FPGA设计中需要着重考虑的两个问题及解决方法。

Being a most widely used programmable component ,FPGA is widely used in our daily working while it is referred to digit circuit designing.But FPGA will be working in a unreliable condition ,if we do not know incide it very well. This papeKey words： FPGA Sequence Clock Convergencer introduces some ways to solve two FPGA-Designing questions which we must treat seriously.