±5V高频四象限CMOS模拟乘法器

A ±5V Current Mode CMOS Four quadrant Analog Multiplier with High Frequency Capacity

提出了一种新型四象限 Ｃ Ｍ Ｏ Ｓ 模拟乘法器电路，其核心结构为线性化压控源耦对。基于 Ｍ Ｏ Ｓ Ｉ Ｓ２μｍ ｐ阱 Ｃ Ｍ Ｏ Ｓ 工艺参数的 Ｐ Ｓ Ｐ Ｉ Ｃ Ｅ 模拟结果表明：当电源电压为±５ Ｖ，输入范围为±４ Ｖ 时，非线性误差小于０９ ％ ，乘法运算误差小于１０ ％ ；在±３ Ｖ 的输入范围内，非线性误差小于０４ ％ ，乘法运算误差小于０７ ％ ；－ ３ｄ Ｂ 带宽一端为１３０ Ｍ Ｈｚ ，另一端为７２０ Ｍ Ｈｚ ；整个电路静态功耗为４９０ ｍ Ｗ 。

A new current mode CMOS four quadrant analog multiplier consisted of two voltage controlled source coupled pairs is presented. The simulation results based on MOSIS 2μm p well CMOS process parameters show that under ±5V supply voltages and over ±4V input range, the nonlinear error is less than 0 9% and computation error is less than 1 0%;under the ±3V input range, the nonlinear error is less than 0 4% and computation error is less than 0 7%. The ±3dB bandwidth at Y input terminal is 130MHz, and, X input terminal, is 720MHz. The power dissipation is 4 90mW.