基于DSP的信号处理系统研制及恒虚警算法验证

Development of Signal Processing System Based on DSP and Verification of Constant False Alarm Rate Algorithm

根据实际需要,利用DSP+FPGA技术,研制了一种验证信号处理算法的硬件系统,该硬件系统能够采集雷达中频及视频回波信号,可用于对各种信号处理算法的工程应用价值进行客观评估,对算法的实时性、效果进行了验证和分析,该系统由DSP、FPGA、双路高速A/D和D/A等构成,可对串行、并行输入的信号进行处理,处理后的信号可以以串行、并行方式输出。通过与雷达模拟信号源的系统联试及恒虚警算法的验证,证明该系统达到了设计功能和性能要求,已装备使用。对系统的硬件、软件结构和有关实验结果进行了介绍。

A kind of hardware system for verifying signal processing algorithms has been developed using DSP and FPGA according to practical need. The hardware system can collect radar intermediate frequency and vedio frequency signal, evaluate engineering value of all kinds of signal processing algorithms, and validate and analyze real-time characteristics and effects of algorithms. This system is comprised of DSP, FPGA, dual high-speed A/D and D/A, can process serial and parallel input signals and the processed signals can be output by serial and parallel modes. It has been proved that the system reaches the standard of the design function and performance by way the validation of CFAR and test with radar simulation signal source, and the system has been equipped to use. System hardware, software architecture and experimental results are introduced in the article.