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一种处理器无关的trace协处理器自动产生方法

A Processor-Independent Trace Co-Processor Synthesis Method
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摘要 本文提出了体系结构无关的程序热trace提取方法,把基于trace的软硬件划分从机器代码层次提高到了中间代码表示的控制数据流图层次,从而实现了处理器体系结构无关的trace协处理器自动产生方法;提出了基于散列签名的trace预测方法,支持包含环路结构的trace预测,提高了平均命中率.基于上述工作实现的协处理器自动产生方法,可以作为系统级设计优化工具应用于现有的SoC软硬件开发流程.实验表明,与基于机器指令trace的方法相比,本文方法获得的系统平均性能提高了22.6%. The architecture-independent hot trace extraction method is presented,with which the processor architecture-independent trace co-processor synthesis is achieved by promoting trace-based HW/SW partitioning from the level of machine instruction to that of control data flow graph of intermediate code.To support trace predication in cyclic structure for better average hit rate,hash-signature based trace predication is proposed.Based on the above work,a processor-independent co-processor synthesis method is implemented,which can be seamlessly integrated with the hardware and software development process as a system-level design optimization tools.The experiment reveals that the result system performance is increased by 22.6% over instruction trace based method.
出处 《电子学报》 EI CAS CSCD 北大核心 2011年第2期402-407,共6页 Acta Electronica Sinica
关键词 协处理器自动产生 中间表示 TRACE 推测执行 co-processor synthesis intermediate representation trace speculative execution
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