摘要
VHDL语言是EDA设计中常用的一种IEEE标准语言,具有覆盖面广、描述能力强、可读性好、支持大规模设计及逻辑单元利用等优点,因此受到越来越多的电子工程师的青睐。数字信号处理在科学和工程技术许多领域中得到广泛的应用,本文采用一种基于FPGA的数字滤波器的设计方案,首先分析了数字滤波器的原理及设计方法,然后通过MAX+PLUSⅡ的设计平台,分别对各模块采用VHDL语言进行描述,并进行了仿真和综合。仿真结果表明,本文所设计的数字滤波器运算速度较快,系数改变灵活,有较高的参考价值。
VHDL language is a commonly used IEEE standard language in EDA design,and it has been paid more and more attention by electronic engineers because of its advantages such as wide coverage,strong description ability,high readability and support for large-scale design and the use of logic unit.Digital signal processing has been widely applied in the fields of science and engineering technology.A FPGA-based digital filter design is introduced in this paper.Firstly,the principle and design methods are analyzed;secondly,each module is respectively described with VHDL language,and the simulation and synthesis is carried out through the MAX ＋ PLUS Ⅱ design platform.The simulation results show that the designed digital filter has higher reference value for its fast operation speed and flexible and changeable coefficients.
