基于FPGA的数据采集系统的设计

Design of data acquisition system based on FPGA

文章介绍了基于FPGA对多路数据同步实时采集的一种新型数据采集系统设计,该系统将多个功能模块封装在一个FPGA系统中,并用FPGA来完成A/D转换和双口RAM等模块的控制,对采集到的数据在存储器中进行分页存储,有效解决了通信过程中地址冲突问题,实现了对信号任意长度的连续采样。该数据采集系统具有性能稳定、实时性强、集成度高、扩展灵活等特点。

A new kind of data acquisition system is introduced in this paper, in which the multi-channel synchronized real-time data acquisition under the coordinate control of field-programmable gate array（FPGA） is realized. In this system, several functional modules are packaged in a FPGA chip to implement the A/D conversion and control of the dual-port RAM and other modules, and the gathered data is stored by paging in the memorizer. It effectively solves the problem of address conflicts during the course of communication and realizes the continuous sampling to any signal length. The proposed data acquisition system has characteristics of stable performance, flexible expansion, high real-timeness and integration.