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基于局部重配置的FPGA互连测试诊断 被引量：3

FPGA Interconnect Test and Diagnosis Based on Partial Reconfiguration
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摘要 针对FPGA互连开关的常开、常闭、线段的开路、常0、常1故障,以及连接于同一开关矩阵的互连线段桥接故障的测试诊断问题,提出一种自动生成与应用无关的测试配置进行故障诊断的方法。通过对布线资源图中节点分方向遍历、生成全局和局部测试配置,用JTAG施加测试激励和回读结果。实验结果证明只需要较少配置时间就能够使互连故障覆盖率达到100%。 This paper presents an automatic test-configuration-generation method to test and diagnose all stuck-on,stuck-off faults in Programmable Interconnect Points（PIP）,open,stuck-at faults in segments and all bridge faults between segments connecting to the same switch matrix.By searching all nodes of routing resource graph by direction,the proposed method generates total and partial configurations and then uses JTAG boundary scan chain to apply test vectors on them and readback results.Experimental results show that short time of configuration is required to cover all faults.
作者 马珂洁 包杰 周学功 王伶俐
机构地区 复旦大学专用集成电路国家重点实验室
出处 《计算机工程》 CAS CSCD 北大核心 2011年第5期249-252,共4页 Computer Engineering
基金 国家自然科学基金资助项目(60676020) 国家"863"计划基金资助重点项目(2009AA012201) 上海市浦江人才计划基金资助项目(2008年) 上海市科委集成电路设计基金资助专项(08706200100)
关键词 现场可编程门阵列 互连测试 故障诊断 局部重配置 Field Programmable Gate Array（FPGA） interconnect test fault diagnosis partial reconfiguration
分类号 N945 [自然科学总论—系统科学]
  • 相关文献

参考文献6

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二级参考文献5

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共引文献1

同被引文献23

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引证文献3

二级引证文献9

计算机工程
2011年 第5期

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