基于FPGA的UART模块设计及仿真

Design and simulation of UART module based on FPGA

基于FPGA芯片为处理器的系统中,采用Verilog硬件描述语言设计了一款具有通用性的UART模块,通过仿真验证,做到了运行稳定、抗干扰性强。此驱动的实现方式通用性较好,实现了片上可编程系统,简化了电路设计,减少了电路板面积,因此具有很强的实际意义。

The system, using FPGA chip as the processor, provides a UART module, which is designed by Verilog hardware description language and can be commonly spread.Simulation tests show that, this system features stable and anti-jamming as well.Because it can program directly on chips, simplify the circuit design, and reduce the circuit area, the system means significantly on practice.