摘要
本文主要依靠FPGA平台利用VHDL语言设计数字通信系统的编译码系统。通过在QuartusII7.2上用软件编程实现汉明码编译码、DPSK调制解调等功能,并进行时序仿真验证其逻辑功能,充分体现了FPGA开发周期短、程序修改更新方便和自上而下设计流程等优势,对于其他同类型的设计开发具有指导意义。
A FPGA-based channel coding and decoding system is designed by VHDL in this paper. The function of hanmencoding /decoding and DPSK modulation/ demodulation is realized by the software of QuartusII7.2, which is proved its logic by timing simulation. It embodies the advantages of FPGA development and design: the period of development is short, the revise and update of program is convenient, top-down design process and so on. It provide guide for other similar design.
出处
《科技广场》
2011年第1期145-147,共3页
Science Mosaic