期刊文献+

基于改进的CORDIC算法的FFT复乘及其FPGA实现 被引量:2

Improved cordic-based FFT plural-multiplication and its FPGA implementation
下载PDF
导出
摘要 根据定点FFT中旋转因子所对应的CORDIC旋转方向可预先求解的特点,改进了CORDIC算法中旋转方向的计算方法,在节约乘法器资源的同时兼顾了速度与精度的要求,并基于改进的CORDIC算法,利用FPGA实现了这种FFT复乘模块。仿真结果表明该设计可行,具有一定的实际意义和应用前景。 This paper improved the algorithm of rotate direction in CORDIC according to the characteristic of CORDIC rotation direction of rotation factor can be solved in advance in fixed point FFT, meeting the requirements of high-speed and precision as well as resources-saving. And realized this FFF plural-multiplication module based on improved CORDIC algorithm by using FPGA, and the simulation result shows that it is feasible and has some practical meaning and applied foreground.
出处 《电子技术应用》 北大核心 2011年第4期51-54,共4页 Application of Electronic Technique
关键词 坐标旋转数字计算方法 复数乘法 模校正因子 现场可编程门阵列 CORDIC algorithm plural-muhiplication mod correction factor FPCA
  • 相关文献

参考文献4

二级参考文献17

  • 1蒋增荣 曾永泓.快速算法[M].长沙:国防科技大学出版社,1993..
  • 2Duhamel P. Implementation of Split-Radix FFT Algorithms for Complex, Real and Real Symmetric Data[J]. IEEE Trans. ASSP, 1986, 34(2): 285 - 295.
  • 3Chang Y N, Parhi K K. An Efficient pipelined FFT Architecture[J]. IEEE Transactions on Circuits and Systems II, 2003, 50(6): 322 - 325.
  • 4Tanno K, Takeda T, Horiguchi S. Parallel Radix 4 FFT Algorithms on an Eight-neighbor Processor Array[A].Proc IEEE TENCON'92[C]. 1992. 855 - 859.
  • 5Banerjee Ayan, Sundar Dhar, Anindya, Banerjee Swapna.FPGA realization of a CORDIC based FFT processor for biomedical signal processing. Microprocessors and Microsystems, 2001,25(3): 131~142.
  • 6Lo Pei-Chen, Lee Yu-Yun. Real-time implementation of the split-radix FFT- An algorithm to efficiently construct local butterfly modules. Signal Processing, 1998,71(3): 291~199.
  • 7Chu Eleanor, George Alan. FFT algorithms and their adaptation to parallel processing. Linear Algebra and its Applications. 1998,284( 1-3):95~124.
  • 8H.M.Ahmed,Jean Marc Delosme,M.Morf.Highly Concurrent Computing Structure for Matrix Arithmetic and Signal Processing[J].IEEE Comput,1982; (15):65-82.
  • 9E Deprettere,P Dewilde,R Udo.Pipelined CORDIC Architecture for Fast VLSI Filtering and Array Processing[C].ICASSP84,1984:41.A.6.1-41.A.6.-4.
  • 10M W Kharrat,M LouLou,N Masmoudi,L Kamoun.A New Method to Implement CORDIC Algorithm[C].IEEE International Conference on Electronic,Circuit and Systems,2001; (2):715-718.

共引文献25

同被引文献9

引证文献2

二级引证文献4

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部