基于FPGA的实时边缘检测系统

Real-Time Edge Detection System Based on FPGA

提出一种基于FPGA的实时边缘检测系统,运用Verilog语言实现了系统的数据采集、存储和显示。并针对目前边缘检测易受噪声影响的缺点,采用一种结合中值滤波和改进的Sobel边缘检测的图像预处理算法。通过与经典Sobel边缘检测算法处理后的图像相比较,证明所研制的系统对图像噪声干扰有较强的抑制能力,且提取的边缘定位较准确,可适用于对实时性要求较高的智能监控、识别和跟踪等领域。

This paper presents a real-time edge detection system based on FPGA,using Veilog language to implement the system of data collection,storage and display.Aiming at the problem that the image edge detection affected by noise,this paper proposes a combination of median filtering and the improved Sobel edge detection preprocessing algorithm.Experimental results are compared with the results of the classic Sobel edge detection,which demonstrate the developed system has a strong image noise suppression and precise of edge extraction.It can be used in the fields that required for real-time,such as intelligent surveillance,identification and tracking and so on.