摘要
采用TSMC0.13μm CMOS工艺,对多模多频段移动数字电视调谐芯片内I2C接口电路进行设计和验证。采用数字集成电路设计流程,详细验证接口电路的时序。布局布线后得到较为理想的版图面积与功耗。版图后仿真结果表明,在100MHz时钟下,电路满足I2C协议的时序要求,可广泛应用于移动数字电视调谐芯片中。
The design and verification of I2C interface circuit in multi-mode multi-band mobile digital TV tuner in TSMC 0.13 μm CMOS technology are presented. The I2C interface circuit is designed following digital IC design flow and timing of this circuit is verified strictly. A satisfactory layout area and power consumption are obtained after placement and routing. Post-layout simulation results show that the circuit meets the timing requirements of I2C protocol in 100 MHz clock and can be widely used in mobile digital TV tuner.
出处
《电视技术》
北大核心
2011年第9期43-46,共4页
Video Engineering
基金
省部产学研结合项目(2009A090100019)
