期刊文献+

一种高电源抑制的基准源的设计 被引量:1

Design of a high PSR reference
下载PDF
导出
摘要 本文针对传统基准电压的低PSR以及低输出电压的问题,通过采用LDO与带隙基准的混合设计,并且采用BCD工艺,得到了一种可以输出较高参考电压的高PSR(电源抑制)带隙基准。此带隙基准的1.186 V输出电压在低频时PSR为-145 dB,在0~1 GHz频带内,最高PSR为-36 dB。在-50~150℃内,1.186 V基准的温漂为7.5 ppm/℃。 Aiming at the problems of low PSR (Power Supply Rejection) and low output voltage of a traditional reference, by using a combination of LDO and bandgap reference and BCD process, a high PSR bandgap reference with high reference voltage is got. The low frequency PSR of the 1.186V output voltage is -145dB, and the biggest PSR is -36dB in the frequency range of 0-1GHz. The temperature coefficient of the 1.186V is 7.Sppm/℃ in the temperature range of-50-150℃.
作者 韩荆宇 杨兵
出处 《电子设计工程》 2011年第7期169-171,共3页 Electronic Design Engineering
基金 北京市优秀人才资助项目(20061D0500200128)
关键词 电源抑制 级联 带隙基准 低压差线性稳压器 温度系数 PSR caseode bandgap reference LDO temperature coefficient
  • 相关文献

参考文献7

  • 1Youn J H, Do H L, Kwon B H. A single-stage electronic ballast with high power factor [J]. IEEE Transactions on Industrial Electronics, 2000, 47 (3): 716-718.
  • 2Robert W E. Fundamentals of Power Electronics [M]. 1st ed. New York: Chapman& Hall, 1997.
  • 3Leung K N, Mok P K T, Leung C Y. A 2-V 23-μA 5.3-ppmFC 4th-order curvature-compensated CMOS bandgap reference [C]//Custom Intergrated Circuits Conference, 2002: 457-460.
  • 4Buck A E, McDonald C L, Lewis S H, et al. A CMOS bandgap reference without resistors [J]. IEEE Journal of Solid-State Circuits, 2002, 37( 1 ): 81-83.
  • 5Brokaw A P. A simple three-terminal IC bandgap reference [J]. IEEE Journal of Solid-State Circuits, 1974, 9(6): 388-393.
  • 6Ai-Shyoukh M, Lee H, Perez R. A transient-enhanced lowquiescent current low-dropout regulator with buffer impedance attenuation [J]. IEEE Journal of Solid-State Circuits, 2007, 42(8): 1732-1742.
  • 7Baker R J. CMOS Circuit Design, Layout, and Simulation [M]. 2nd ed Wiley-IEEE Press, 2008:647.

同被引文献8

引证文献1

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部