组合压缩在存储测试系统中的应用

Application of combinational compression in storage test system

在某些特殊的测试环境中,存储测试系统中既要求大容量数据存储又要求微体积。为解决这一矛盾,在研究了游程压缩和LZW两种算法的基础上,提出了以FPGA为核心实现两种算法的无损组合压缩,利用FPGA芯片内的RAM来建立字典,用VHDL语言和状态机实现该压缩算法。仿真和综合验证表明,通过FPGA实现该组合算法,压缩效果显著,压缩性能与压缩速度均满足系统要求。

In some special test environment, storage test system is limited by high capacity data storage and small size. In order to solve above all, lossless combinational compression is implemented by FPGA on the basic of studying the run-length com- pression and LZW algorithm. A dictionary is established by internal memory of FPGA and the algorithm is achieved by VHDL and state machine. Simulation and verification indicate that combinational compression is an efficient algorithm, and compression performance and speed meets system requirements.