FCT网络的并发错误检测结构

A CONCURRENT ERROR DETECTION SCHEME FOR FCT NETWORKS

文中提出了一种快速离散余弦变换（ＦＣＴ）电路的并发错误检测（ＣＥＤ）结构．为了达到１００％ 的故障覆盖率，ＦＣＴ采用基于第３类离散余弦变换的Ｂ．Ｇ．Ｌｅｅ 算法蝶型结构实现．检测采用的方法是基于算法的并发错误检测容错方法，因为基于算法的容错（ＡＢＦＴ）技术的硬件冗余量较少．对所提出的结构，文中证明了其１００％ 的故障检测能力．但在实际应用中，由于有限字长效应会带来误差，因此文中分析了有限字长效应对系统的吞吐量及故障覆盖率的影响。

A concurrent error detection(CED) design is proposed for fast discrete cosine transform(FCT). To achieve the goal of 100 percent fault coverage, FCT is realized by using a butterfly architecture of the B.G.Lee fast algorithm based on DCT\|III. Algorithm\|based fault tolerance(ABFT) is used for error detection because ABFT is a low\|cost system\|level concurrent error detection and fault location scheme. The error detection capability of this scheme is analyzed. When the FCT is implemented with hardware, errors due to finite word length is unavoidable. So the influence of large truncation errors on the throughput and fault coverage is discussed and a conclusion is obtained.