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一种改进的GALS异步包装电路 被引量：1

An improved asynchronous wrapper for GALS
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摘要 GALS(全局异步、局部同步)架构适用于NoC的时钟分布,但现有的GALS需要定制地设计异步包装电路,不利于验证和集成.采用通用的数字ASIC设计流程,在仅使用已有标准单元的情况下,提出了一种新的基于FIFO的异步包装.通过此包装电路,实现了一个信号传输只需2步操作,提高了通信吞吐率.实验结果表明该包装电路在吞吐率和延迟上获得了显著改进. GALS（Globally asynchronous,locally synchronous） architecture is a promising solution for NoC clock distributing.However,traditional implementations of asynchronous wrapper for GALS require certain designed circuits,which are not suitable for verification and IP merging.This paper proposed a new FIFO-based asynchronous wrapper,which implemented using only standard cell and optimized in a standard digital ASIC flow.It achieves high throughput by this wrapper,which needs only two transitions per symbol.The results show that this wrapper can provide great improvement in throughput and latency.
作者 董文箫 陈华锋 沈海斌
机构地区 浙江大学超大规模集成电路设计研究所 浙江传媒学院电子信息学院
出处 《浙江大学学报（理学版）》 CAS CSCD 北大核心 2011年第3期294-298,共5页 Journal of Zhejiang University（Science Edition）
基金 国家自然科学基金资助项目(60720106003)
关键词 片上网络 时钟分布 2相双轨 异步包装 全局异步局部同步 networks on chip clock distributing 2-phase dual rails asynchronous wrapper GALS（Globally asynchronous Locally synchronous）
分类号 TP302 [自动化与计算机技术—计算机系统结构]
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参考文献10

  • 1CHAPIRO D M. Globally-asynchronous Locally-synchronous Systems[D]. Stanford.. Stanford Univ, CA Dept of Computer Science, 1984.
  • 2BEIGNE E, CLERMIDY F, LHERMET H, et al. An asynchronous power aware and adaptive NoC based circuit[J]. IEEE J of Solid-State Circuits, 2009,44 (4) : 1167--1177.
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  • 10周端,朱樟明,杨银堂,史明华,梁政.一种基于标准逻辑单元的GALS异步封装电路[J].电路与系统学报,2009,14(5):112-116. 被引量：2

二级参考文献7

  • 1Zhuang Shengxian, Li Weidong, Carlsson J. An asynchronous wrapper with novel handshake circuits for GALS systems [A]. IEEE Proc. on communications, circuits and systems 2002 [C]. 2002, 2: 1521-1525.
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  • 6Amini E, Najibi M, Pedram H. Globally asynchronous locally synchronous wrapper circuit based on clock gating [A]. IEEE Computer Society Annual Symposium on Emerging VLSI Technologies and Architectures [C]. 2006.6-9.
  • 7J Carlsson, K Palmkvist, L Wanhammar. A Clock Gating Circuit for Globally Asynchronous Locally Synchronous Systems [A]. IEEE Norchip Conf. [C]. Sweden, 2006.

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浙江大学学报（理学版）
2011年 第3期

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