摘要
介绍了一种基于Flash ADC和FPGA(现场可编程门阵列)的八通道1Gsps数据采集系统的设计与测试。重点讨论了系统设计的关键点、难点,包括1GHz时钟信号的产生和扇出,500MHz源同步数据的捕获、处理,高速PCB设计。另外还介绍了系统的测试,描述了1GHz时钟信号的测试结果以及系统主要性能的测试结果。
The design and test of an eight - channel 1 Gsps data acquisition system based on Flash ADC and FP- GA (Field Programmable Gate Array) is introduced. The key points and difficulties of system design are the keystone of discussion, such as the generation and fan - out of 1 GHz clock signal, the capture and processing of 500 MHz source -synchronized data, the design of high speed PCB. Besides that the paper introduces the test of system, describes the test results of 1 GHz clock signal and the main perforrnanees of system.
出处
《核电子学与探测技术》
CAS
CSCD
北大核心
2011年第4期395-398,406,共5页
Nuclear Electronics & Detection Technology
基金
国家自然科学基金
中微子探测器读出电子学关键技术研究(10890091)