基于USB通信的FPGA高速数据采集系统

FPGA high-speed data acquisition system based on USB communication

为了解决高速数据采集以及数据传输问题,设计了基于USB通信的FPGA高速数据采集系统。方案以FPGA为控制核心,实现A/D控制、数据缓存双口RAM和控制CY7C68013A三个功能。系统采用Verilog HDL语言,通过ISE软件编程控制多个AD7356同时进行数据采集,将采集所得数据存入双口RAM,控制CY7C68013A将数据通过USB总线上传到PC机。系统进行实测实验表明,在CY7C68013A设定为16.7 Mb/s的传输速率下,系统工作正常。

A FPGA high-speed data acquisition system based on USB communication is designed to solve the problems of high-speed data acquisition and transmission. The system takes FPGA as a controlling core to implement three functions of A/ D control, data buffering dual-port RAM and CY7C68013A control. The programme is compiled with Verilog HDL language and ISE software to control multi-AD7356 to acquire data, store the acquired data in dual-port RAM, and control CYTC68013A to upload data to PC via USB. The experiment testifies that the system works well when CY7C68013A＇s transmission velocity is set as 16.7 Mb/s.