摘要
基于直接测频法原理,利用CPLD可编程器件EP1K50QC208-3设计了数字频率计.数字频率计主要有主板及显示两大模块.软件部分采用VHDL硬件描述语言进行设计,最后实现在LED数码管上显示频率为1~999 999 Hz的数字频率计.该设计方法与传统的测周期法系统相比,具有测频精度高、速度快、范围宽等优点.
Based on the principles of direct frequency measuring method, a digital frequency meter was designed by using CPLD programmable device EP1KSOQC208-3. The hardware of the digital frequency meter includes a board and a display module, and the software part is designed by VHDL hardware description language, making the meter with a LED digital display frequency of 1-999999Hz. Compared with traditional method of measuring period, this method is advantaged in high accuracy in frequency measurement, high speed, wide range and so on.
出处
《徐州工程学院学报（自然科学版）》
CAS
2011年第1期22-28,共7页
Journal of Xuzhou Institute of Technology(Natural Sciences Edition)
关键词
直接测频法
数字频率计
CPLD
VHDL语言
direct frequency me asurement
digital frequency meter
CPLD
VHDL language
