摘要
完成了10/100(Mb/s)以太网介质访问控制器芯片的设计与实现,介绍了芯片的架构和主要模块的设计方法,给出了仿真结果.芯片采用0.25μm CMOS工艺流片,工作电压为2.5 V/3.3 V.测试表明,芯片性能完全符合IEEE802.3标准,达到了设计要求.
The design and implementation of a 10/100（Mb/s） Ethernet media access controller chip are presented in this paper.Chip architecture and the design methods of main modules are introduced.The simulation results are also given in this paper.This chip is fabricated using 0.25 μm CMOS technology and operates at 2.5 V/3.3 V supply voltage.Test results show that the chip performance fully complies with IEEE802.3 standard and meets the design requirements.
出处
《微电子学与计算机》
CSCD
北大核心
2011年第6期1-4,共4页
Microelectronics & Computer
基金
天津市科技支撑计划重点项目(09ZCGYGX101100)
