期刊文献+

一种16位高速数模转换器(DAC)的设计与实现 被引量:6

Design and Implementation of a 16-Bit High Speed Digital to Analog Converter(DAC)
下载PDF
导出
摘要 基于Mixed-Signal CMOS工艺,设计了一种采用分段式电流舵结构的高速高精度DAC.电路设计中同时在该DAC的内部电路中采用了一种新的电流校准技术,既保证了DAC电路的高精度,又减小了梯度误差的影响.电路流片后的实际测试结果表明,该16位DAC在400MSPS转换速率下仍具有良好的性能. A high speed and high resolution DAC with segmented current-steering is presented here by using mixed-signal CMOS technology.Meanwhile,with a novel current calibration technique,it can guarantee the high resolution and reduce the effect of gradient mismatch.The tape-out circuit test results show that the 16-bit DAC achieve favorable performance at conversion rates up to 400MSPS.
出处 《微电子学与计算机》 CSCD 北大核心 2011年第6期31-35,共5页 Microelectronics & Computer
关键词 数模转换器(DAC) 自校准 校准DAC(CALDAC) Digital to Analog Converter(DAC) self-calibration CALDAC
  • 相关文献

参考文献5

  • 1Jose Bastos, Augusto M Marques, Michel S J. Steyaert and willy sansen a 12- bit intrinsic accuracy high- speed CMOS DAC[J]. IEEE Journal of Solid--State Circuits, 1998,33(12) : 1959-1960.
  • 2Chi-- Hung Lin, Klaas Bult. A 10-- b, 500-- M, sam- ple/s CMOS DAC in 0. 6mm2[J]. IEEE Journal of Solid --State Circuits, 1998,33(12) :1948-1998.
  • 3赵耀华,陆铁军,王宗民.基于VLSI的高速LVDS接口设计[J].微电子学与计算机,2009,26(11):78-81. 被引量:5
  • 4Bugeja A R, Song B. A 14b, 100Ms/s CMOS DAC de- signed for spectral performance[J]. IEEE Journal Solid --state Circuits, 1999(34) : 1719-1731.
  • 5Bugeja A R, Song B. A self--trimming 14b, 100Ms/s CMOS DAC [J]. IEEE Journal Solid - state Circuits, 2000(35) : 1841-1852.

二级参考文献7

  • 1张家川,刘伯安.高速多电平LVDS收发器设计[J].微电子学与计算机,2007,24(4):69-71. 被引量:8
  • 2IEEE Standard for Low-voltage differential signals(LVDS) for scalable coherent interface[S]. IEEE press, 1996.
  • 3ANSI/TIA/EIA Standard. TIA/EIA-644, Electrical characteristics of low-voltage differential-signaling interface circuits[S]. National Semiconductor Corp. , 1996.
  • 4Qin Tang, Qin Yin, Jian-hui Wu. Low power LVDS driver used in ADC systerns[C]//8th Intemational conference on Solid state and integrated circuit technology proceedings. Shanghai: IEEE press, 2006.1664- 1666.
  • 5Koh Chin Yeong, Ma Fan Yung, Koh Tee Peng, et al. 1. 2Gbps LVDS interface [C]//IEEE International Symposium on Integrated Circuits. Rio de Janeiro: IEEE press, 2007:328 385.
  • 6Kwan- Woo Yoo, Jeong Beom Kim. Design of a high - speed LVDS I/O interface using telescopic amplifier [ C]// 2006 8th Integrated Circuit on Solid - State and Integrated Circuit Technology Proceedings. Shanghai: IEEE press, 2006 : 1987 - 1989.
  • 7Mingdeng Chen, Jose Silva- Martinez, Michael Nix, et al. Low - voltage low - power LVDS drivers [ J ]. IEEE Solid- State Circuits, 2005,40(2) : 115 119.

共引文献4

同被引文献7

引证文献6

二级引证文献8

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部