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一种DES算法的FPGA快速实现方法 被引量：2

A High-speed FPGA Implementation of DES Algorithm
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摘要 该文阐述了密码算法FPGA快速实现的一种方法,利用Mentor Graphics的Catapult C综合工具,完成了DES算法从计算机仿真到硬件实现的全过程,代替了传统FPGA实现处理过程,可大大缩短项日的开发周期和降低作难度。 This paper describes a method of fast FPGA implementation of cryptographic algorithm.The method completes full process from simulation to hardware implementation by using Mentor Graphics Catapult C.This method replaces traditional process of FPGA implementation,so it can reduce develop period and difficulty.
作者 鄢斌
机构地区 海军计算技术研究所
出处 《舰船电子工程》 2011年第6期139-141,148,共4页 Ship Electronic Engineering
关键词 DES算法 FPGA C综合 DES algorithm FPGA precision C
分类号 TP301.6 [自动化与计算机技术—计算机系统结构]
  • 相关文献

参考文献7

  • 1M. McLoone, J.V. McCanny. High-performance FP- GA implementation of DES using a novel method for implementing the key schedule. IEE Proc. : Circuits, Devices & Systems, 2003,150 : 373- 378.
  • 2肖国镇,白恩健,刘晓娟.AES密码分析的若干新进展[J].电子学报,2003,31(10):1549-1554. 被引量：31
  • 3Jhing-Fa Wang, Sun-Wei Chang, Po-Chuan Lin.A Novel Round Function Architecture for AES Encryption/Decryption Utilizing Look-up Table. 2003.
  • 4Monica Liberatori, Fernando Otero J. C. Bonadero, Jorge Casti eira. AES-128 CIPHER. HIGH SPEED, LOW COST FPGA IMPLEMENTATION. 2007.
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二级参考文献27

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共引文献30

同被引文献20

引证文献2

二级引证文献4

舰船电子工程
2011年 第6期

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