6Watanabe R,et al.Task scheduling under performance constraints for reducing the energy consumption of the GALS multi-processor SoC. Proceedings of IEEE/ACM DATE . 2007
2Govindarajan S, Vemuri R. Dynamic bounding of successor force computations in the force directed list scheduling algorithm[C]// Proceedings of IEEE International Conference on Computer Design (ICCD), 1997, 752-757.
3Hwang C T, Lee J H, Hsu Y C. A formal approach to the scheduling problem in high level synthesis[J]. IEEE Trans. Comput. -Aided Des. Integ. Circuits Syst, 1991, 464 - 475.
4Paulin P G, Knight J P. Force-directed scheduling for the behaw ioral synthesis of ASIC' s[J]. IEEE Trans. Computer-Aided Design, 1989, 210-213.
5Arato P, Mann Z A, Orban A. Time-constrained scheduling of large pipelined datapaths[J]. Journal of Systems Architecture, 2005, 665 - 668.
6Potasman R, Lis J, Alexandru, et al. Percolation based synthesis[C]//Annual ACM IEEE Design Automation Conference Proceedings of the 27th ACM/IEEE conference on Design automation, 1991.
7Hwang C T, Hsu Y C, Lin Y L. Scheduling for functional pipelining and loop winding[C]//DAC, 1991, 764- 769.
8Chao L F, LaPaugh A, Sha E. Rotation scheduling: a loop pipelining algorithm[C]//In 30th ACM/ IEEE Design Automation Conference, 1993, 566 - 572.
9Dhodhi M K, Hielscher F H, Storer R H, et al. Data-path synthesis using a problem-space genetic algorithms [J ]. IEEE Trans. Comput. Aided Des. , 1995, 47-56.
10Krishnan V, Katkoori S. A genetic algorithm for the design space exploration of datapaths during high-level Synthesis[J]. IEEE Trans. on Evolutionary Computation, 2006.
