摘要
晶体管工艺的持续发展导致片上处理器数的逐渐增多,片上系统的核间通信要求吞吐量高、延时低、可扩展性好,传统的片上总线和crossbar互连结构已无法满足片上系统的通信需求,为此研究者提出新的片上互连结构,称为片上网络.为满足片上网络的特有通信需求,提出了一种可扩展的拓扑结构Rgrid及其路由算法DR,它缩短了片上处理器间的平均距离并且比Torus结构容易实现.作者在龙芯用户级模拟器上分别实现Mesh和Rgrid结构,运行Splash2并行测试程序集比较这两种结构的性能优劣.运行程序结果表明,Splash2程序在Rgrid结构中运行得到的IPC比在Mesh结构增加了0.5%~148%,Rgrid结构的平均延时比Mesh小5%~81%.
The development of integrated circuits makes the number of on-chip cores increase.Communication among the cores demands higher throughput,lower latency and more scalability.Traditional on-chip bus can not satisfy the need of on-chip communication.So researchers present a new interconnect architecture,called network on chip.In order to meet the special demand of network on chip,this paper gives a scalable topology named Rgrid and its routing algorithm called DR.Rgrid can reduce the average hops between on-chip cores,whose physical implementation is much easier than Torus topology.The author implements the Rgrid and Mesh tolopogies in the Godson3 simulator.The simulation results show that,simulator can gain much better performance using Rgrid topology than using Mesh topology for the Splash2 benchmarks.Compared to Mesh topology,the IPC of benchmarks of Rgrid increases by 0.5%~148%,the average latency degrades by 5%~81%.
出处
《计算机学报》
EI
CSCD
北大核心
2011年第5期924-930,共7页
Chinese Journal of Computers
基金
国家科技重大专项基金(2009ZX01028-002-003
2009ZX01029-001-003)
国家自然科学基金(60736012
60921002
61050002
61003064
61070025)资助
关键词
拓扑结构
片上网络
可扩展
性能优化
topology
network on chip
scalable
performance optimization