GPS全数字三阶环路滤波器的设计研究

Design Research of GPS All Digital Three-order Loop Filter

针对GPS接收机内全数字三阶环路滤波器的参数计算做了研究.并且根据实际的要求,完成了包括对全数字三阶滤波器的噪声带宽和稳态误差门限的一个完整计算.运算结果验证设计指标符合PLL门限小于等于15°,FLL门限小于等于42 Hz的技术要求.

Parameter calculation about all digital three-order loop filters used in GPS Receiver was researched.According to the factual requirement,a full calculation for noise bandwidth and steady-state error threshold of all digital three-order loop filters was made.The results verify the threshold of PLL is less than 15° and the FLL threshold is less than 42 Hz.