ESD保护栅结构20V N沟道沟槽VDMOSFET设计

Gate ESD Protected of 20V N-Channel Trench VDMOSFET Design

文章主要研究了低压ESD保护栅型沟槽VDMOSFET的设计制造方法。首先简要分析了沟槽VDMOSFET的结构、工作原理以及ESD保护结构的理论实现。基于20V N沟道设计的主要参数指标,给出了具体的外延规格、终端结构、版图、工艺流程等主要设计点。在流片的分片单中对沟槽深度、栅氧厚度、P-阱注入剂量以及ESD-poly注入剂量进行分条件流片。通过CP数据以及封装测试数据的对比,确定了最佳的设计方案。最终的直流参数测试值都达到预计指标,在ESD方面,器件可承受大于2.5kV的HBM静电放电。

A low-voltage Gate ESD protected of Trench VDMOSFET was designed.Above of all,The Trench VDMOSFET structure,working principle and the theory of ESD protection structures was analyzed.Based on the design target of the 20V N-channel device,given the specific Epitaxy specifications,terminal structure,layout,process flow.Run different condition at trench depth,gate oxide thickness,P-body dosage and ESD-poly dosage in wafer split-table.From the CP and FT data to get the best design.The final DC parameter get the target of expected.ESD rating is above 2.5kV HBM.