基于CPLD的数字存储示波器的设计

The Design of Digital Storage Oscilloscope Based on CPLD

本文主要介绍一种以可编程逻辑器件为主要控制核心,利用单片机实现控制显示和输入的数字存储示波器。系统中,根据模数转换器特征在CPLD内设计了高速信号采集模块和数据缓存功能的接口单元。利用单片机简单易行的处理能力实现了液晶显示屏(LCD)显示控制和键盘的输入控制。CPLD和单片机的结合,使得该系统利用CPLD快速采集输入信号并利用单片机控制慢速的LCD显示。

This paper introduces a digital storage oscilloscope that takes programmable logic device as main control core and realizes the control on display and input with MCU.In this system,the interface unit of high-speed signal acquisition module and data cache function is designed in CPLD according to the characteristic of ADC.The control on LCD display and keyboard input is realized using the simple and practicable treatment capacity of MCU.The combination of CPLD and MCU can make this system rapidly acquire input signal with CPLD and control low-speed LCD display with MCU.