摘要
提出采用正则有符号数字量(CSD)编码技术实现FIR滤波器。首先分析了FIR数字滤波器理论及常用设计方法的不足,然后介绍了二进制数的CSD编码技术及其特点,给出了其于CSD编码的定点常系数FIR滤波器设计过程,使用VHDL语言实现了该常系数滤波器的行为描述。最后在Max+PlusⅡ环境下进行实验仿真和验证,与DA和2C编码算法比较结果表明,用CSD编码技术实现的滤波器可以有效提高运算速度并降低FPGA芯片的面积占用。
Based on canonic signed CSD algorithm, a FIR digital filter is proposed. Firstly, the theories of FIR digital fil- ter and the shortages of usual designing method are analyzed, then the technology for CSD coding of binary is introduced, and the design process of a fixed point FIR based on CSD coding is presented, the FIR system is realized with VHDL. At last, the simulation design is carried out under Max＋ Plus Ⅱcircumstance, the simulation results show that CSD arithmetic can reduce the use of resources and improve the running speed compared with DA and 2C coding algorithm.
出处
《现代电子技术》
2011年第14期44-46,50,共4页
Modern Electronics Technique
基金
教育部新世纪优秀人才支持计划(NCET-05-0465)
关键词
CSD编码
分布式算法
FIR
FPGA
常系数乘法
CSD coding
distributed arithmetic （DA）
FIR
FPGA
multiplication of constant coefficient
