摘要
针对晶体振荡器的温漂特性,设计了一种基于分频链的时钟校准算法。在不改变晶体振荡器的情况下可调节时钟频率,校准精度达±0.25ppm,校准范围±32ppm,通过多次实验分析,用Verilog-HDL语言编写全部模块,在modelsim6.2b软件中实现模块仿真。全部功能正常实现,符合设计要求。
A calibration algorithm based on divide-chain frequency is designed for the crystal oscillator temperature drift characters.This algorithm can adjust the clock frequency without changing the crystal oscillator.With this method,the calibration accuracy is ±0.25p pm,and the range of calibration is ±32 ppm.Based on many experiments,all modules are compiled by Verilog HDL language,and the modules are realized with Modelsim 6.2b.All of the functions are successfully realized and the result meet requirements.
出处
《中国集成电路》
2011年第7期67-71,共5页
China lntegrated Circuit
