界面电荷对C-Si表面钝化质量的影响

Influence of Interface Charge on Passivation Quality of C-Si Surface

深入分析了影响晶体硅与钝化介质层界面复合的主要因素:界面态密度(Dit)、介质层表面电荷密度、衬底掺杂类型及掺杂浓度。研究发现,随着载流子注入水平改变,介质层的钝化质量与介质层带电类型和硅片掺杂类型紧密相关。随着载流子注入水平的降低,富含正电荷(负电荷)的钝化介质在P型(N型)硅片上的钝化质量随之降低;富含负电荷(正电荷)的钝化介质在P型(N型)硅片上的钝化质量却保持不变。深入分析了P型(N型)掺杂硅片表面钝化质量随注入水平变化而产生不同变化的原因,并为高效晶体硅电池表面钝化提出指导性意见,对于工作在低注入水平条件下(5×1014cm-3)的晶体硅电池非常重要。

The main factors which influence the compound between the passivation medium layer and the crystalline silicon are analyzed, including the interface state density（ Du ）, surface charge density of medium layer, doping type and doping concentration of the substrate. When the carrier injection level varies, the passivation quality is closely related to the charge type in medium layer and silicon doping type. As the carrier injection level decreases, the passivation quality of the passivation medium with positive charge on the P-type （N-type） silicon decreases, but the passivation quality of the passivation medium with negtive charge on the P-type （N-type） silicon still remains constant. The reason of the passivation quality varying with carriers injection level is analyzed. The guiding suggestion for the high effiency crystalline silicon cells is proposed, it is very important for silicon cells operating at low level injection level（ 5 ×10^14cm^-3）.