基于FPGA的广播数字音频延时器设计

Design of Broadcast AES/EBU Digital Audio Delayer Based on FPGA

分析了数字音频延时器设计需求,以安全、可靠、易用、低价为总体设计原则,给出了基于FPGA实现数字音频延时、清除、重建的原理和方法,并着重以非线性时间轴拉伸方法实现重建无空白的工作模式。设计测试结果表明,该设计结构简单,运行可靠,在非线性拉伸时间轴拉伸重建模式下,延时重建不易被听众察觉。

The design requirement of digital audio delayer is analyzed. It uses safe, reliable, easy-to-use and low-cost as design principle, it shows FPGA-based digital audio delay, clearance and reconstruction of the principles and methods, and focuses on the reconstruction of nonlinear timeline extension method implementation the control mode without a blank. Test results show that the design is simple and reliable, in the nonlinear extension reconstruction mode, the audience aware of the reconstruction process is not easy.