基于可控多扫描使能信号的片上系统TR-TC联合测试成本模型

TR-TC Associated Test Cost Mathematical Model in SoC Using Controllable Multi-Scan-Enable

基于片上系统的扫描链结构,针对全速测试研究了多扫描使能(SE)信号的可测性设计,并建立了新颖的测试资源-覆盖率(TR-TC)联合测试成本线性规划数学模型.研究结果表明,该模型不仅可以高效控制全速测试的测试资源消耗以及可测性设计复杂度,而且还可以确立SE信号数量的最优上限,进而避免了以盲目提升SE信号数量来提高转换故障覆盖率的纯理论方式,使面向片上系统全速测试的多SE信号可测性设计方法有一个可靠的目标控制值.

Based on the scan chain structure of SoC（System-on-Chip）,this paper described a method of multi-Scan-Enable DFT for at-speed testing to improve the transition fault coverage.A TR-TC（Test Resources-Test Coverage） associated test cost mathematical model was built.The results show that the TR-TC model can effectively control the complexity of at-speed DFT and establish the optimization number of Scan-Enable,which provides a reliable target control value in multi-Scan-Enable at-speed DFT.