基于FPGA的时延测试方法研究

The research of time-delay test methods based on FPGA

时延性能是信息传输系统中的一项重要指标,时延以及时延抖动等性能会直接影响传输系统的性能。介绍了几种基于FPGA的时延测试方法,对比了各种测试方法的特点,并运用VHDL语言,实现了其中的"脉冲沿"时延测试方法;利用Al-tera SignalTap技术,对脉冲式时延测试方法进行了验证。测试表明,系统占用资源少,工作稳定可靠,满足设计要求。

Time-delay is an important capability of information transferring system,which will directly affect the transmission performance of the system.Some time-delay test methods based on FPGA are introduced and are compared,then VHDL is used to achieve the＇pulse edge＇time-delay test method.Altera SignalTap technology is used to verify this method.The test shows that the system takes up less resources and runs stably,which meets the design requirements.