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高抗振X波段低相噪频率合成器 被引量:1

An Antivibration X-Band Low Phase-noise Frequency Synthesize
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摘要 介绍了一个X波段频率合成器的设计,该频率合成器通过采用混频锁相环的方式实现,本振锁相环输出8GHz的信号,作为混频器的本振信号,混频环最终输出信号为8.5~9.0GHz,输出静态相位噪声为-93dBc/Hz@1kHzoffset。此外,还研制了一种小型化的隔振器来降低振动对晶振的影响,对环路也采取了相应的减振措施,提高了该合成器在振动下的相位噪声,振动环境下相位噪声为-90dBc/Hz@1kHzoffset。 The design of a X-band frequency synthesizer is presented in this paper. We use the mixing phaselocked loop to realize the synthesizer. The local phase-locked loop (PLL) outputs frequency of 8 GHz as the LO source of the mixer and the mixing PLL's output range is 8.5 GHz to 9 GHz. The static phase-noise of the output at 1 kHz off the carrier is -93 dBe/Hz@l kHz offset. Besides we use a vibration isolator to reduce the influence of the vibration on the crystal oscillator. We also take measures to reduce the vibration of the PLL, thus the phase noise performance of the synthesizer has been improved. The phase-noise at 1 kHz off the carrier is --90 dBc/Hz@l kHz offset under vibration.
出处 《压电与声光》 CSCD 北大核心 2011年第4期643-646,共4页 Piezoelectrics & Acoustooptics
关键词 X波段 频率合成 锁相环 抗振 相位噪声 X-band frequency synthesizer PLL antivibration phase-noise
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  • 1鄢华浩,王玫,赵利.基于ΔΣ调制技术的小数分频合成器的设计和实现[J].电子对抗技术,2004,19(6):45-48. 被引量:6
  • 2石寅.我国在芯片研究领域的突破性进展——直接数字频率合成(DDS)芯片[J].中国科学院院刊,2005,20(6):492-494. 被引量:3
  • 3王福昌,鲁昆生.锁相技术[M].武汉:华中理工大学,1996:75-93.
  • 4刘界.宽带环路滤波器的设计[D].南京:东南大学,2006:7-9.
  • 5Tai-Cheng Lee,Keng-Jan Hsiao.The design of DLL-based frequency synthesizer for UWB application[J].IEEE J Solid-state Circuits,2006,41:1245-1252.
  • 6Van De Beek,R C H,Leenaerts,Van Der Weide G.A fast-hopping single-PLL 3-Band MB-OFDM UWB synthesizer[J].IEEE J Solid-State Circuits,2006,41:1522-1529.
  • 7Jri Lee.A 3-to-8-GHz fast-hopping frequency synthesizer in 0.18-μm CMOS technology[J].IEEE J Solide-State Circuits,2005,41:566-573.
  • 8Longjun Zhai,Yonghua Jiang,Xiang Ling,et al.DDS-Driven PLL Frequency synthesizer for X-band Radar signal simulation[C]// IEEE Conference on Systems and control in aerospace and astronautics.IEEE,2006:344-346.
  • 9Bonfanti A,Amorosa F,Samori C,et al.A DDS based PLL for 2.4GHz frequency synthesis[J]IEEE J Circuits and Systems Ⅱ,2003,50:1007-1010.
  • 10Brennan P V,Walkington R,Borkjak A.Performance of synthesizer based on DDS feedback[J]IEEE J Electronics Letters,1998,34:2197-2199.

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