摘要
以太网光接入技术实现了以太网数据在同步光纤网络中传输,结合了以太网和SDH两者的优点。循环冗余校验是一种高效的差错控制方法,由于其误码检测能力强,抗干扰性能优异,在数字通信领域有广泛的应用。针对优化硬件资源的要求,根据EoS系统中数据帧封装的差控校验码算法特点,提出基于FPGA的改进实现方法,通过电路仿真与编译综合结果表明,该方法实现了对高速并行化数据传输的有效保护,在减少资源消耗、提高系统效率两方面都取得了较好效果。
eRe(Cyclic Redundancy Check) is the key mechanism in EoS (Ethernet over SDH) system. EoS technology realizes the SDH transmission of Ethernet data. According to the hardware resources optimization and the characteristics of the HEC check code algorithm for GFP frame length (PLI) , this paper proposes an improved method based on FPGA. Circuit simulation and comprehensive results show that this method could achieve efficient protection of the high-speed parallelized data transmission and better effects in reduction of resource consumption and upgrade of system efficiency.
出处
《通信技术》
2011年第8期60-62,共3页
Communications Technology