并行CRC在FPGA上的实现

CRC parallel computing in FPGA

循环冗余码校验CRC(Cyclic Redundancy Check)广泛用于通讯领域和数据存储的数据检错。基于FPGA在通讯领域和数据存储的应用越来越广泛,CRC的编码解码模块已经是FPGA上的常用模块了。采用超前位计算实现CRC在FPGA上的并行运算,通过实际应用证明该算法能有效实现硬件的速度与资源合理平衡。

The Cyclic Redundancy Check（CRC） is wildly used in the data communication systems and data store systems for error checking.As FPGA become more and more important in the networks and the data access systems,CRC coding and encode have become frequently used common modules in FPGA.This paper realized the CRC parallel computing on FPGA by using bitahead computing.It shows that the algorithm can effectively achieve the balance between speed and resource of hardware through the practical application.